[轉]iMPACT Spartan-6 FPGA - "WARNING:iMPACT:2217-Error shows in the status register, CRC Error bit is Not 0"
AR# 45304
iMPACT Spartan-6 FPGA - "WARNING:iMPACT:2217-Error shows in the status register, CRC Error bit is Not 0"
https://www.xilinx.com/support/answers/45304.html
Description
If I program a Spartan-6 device using iMPACT, the following message occurs:
WARNING:iMPACT:2217-Error shows in the status register, CRC Error bit is Not 0
Configuration completes successfully and DONE goes High on the board.
Why does this message appear?
Solution
If you have "Security Level = 1" or "Security Level = 0" set in your BitGen options, then you might see this warning.
For Spartan-6 FPGA:
Security level:
- Level0: SBITS=00: R/W OK (default)
- Level1: SBITS=01: Permits only ICAP readback
- Level2: SBITS=10: All readback disabled
The status register is covered by this security setting as it is a config register.
It is expected that it will not be readable with security set, so this warning is flagged.
The warning can be ignored if you have these settings.
原創文章 版權?2021 FPGATopic
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